linux:architectuur:endian.html
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linux:architectuur:endian.html [2018/12/30 17:17] |
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| + | <HTML> | ||
| + | |||
| + | <CENTER> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | <H1>Little Endian versus Big Endian</H1> | ||
| + | </FONT> | ||
| + | </CENTER> | ||
| + | |||
| + | |||
| + | <CENTER> | ||
| + | <P> | ||
| + | <TABLE BORDER=2 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH COLSPAN=2> | ||
| + | Compare JUMP instructions | ||
| + | </TH> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TH> | ||
| + | <FONT SIZE="+2" COLOR="0000FF"> | ||
| + | Little Endian CPU | ||
| + | </FONT> | ||
| + | <BR>Intel 8080</TH> | ||
| + | <TH> | ||
| + | <FONT SIZE="+2" COLOR="0000FF"> | ||
| + | Big Endian CPU | ||
| + | </FONT> | ||
| + | <BR>RCA/GE 1806</TH> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Address</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>1000</TD> | ||
| + | <TD>C3</TD> | ||
| + | <TD>JMP 4000</TD> | ||
| + | <TD>; Jump to 4000</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>1001</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 00 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Low Byte</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>1002</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 40 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; High Byte</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | <TD> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Address</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>1000</TD> | ||
| + | <TD>C0</TD> | ||
| + | <TD>LBR 4000</TD> | ||
| + | <TD>; Jump to 4000</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>1001</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 40 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; High Byte</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>1002</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 00 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Low Byte</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </CENTER> | ||
| + | <BR> | ||
| + | |||
| + | |||
| + | <CENTER> | ||
| + | <P> | ||
| + | <TABLE BORDER=2 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH COLSPAN=2> | ||
| + | 16-bit as an extension of 8-bit | ||
| + | </TH> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TH> | ||
| + | <FONT SIZE="+2" COLOR="0000FF"> | ||
| + | Little Endian CPU | ||
| + | </FONT> | ||
| + | <BR>Intel 8080</TH> | ||
| + | <TH> | ||
| + | <FONT SIZE="+2" COLOR="0000FF"> | ||
| + | Big Endian CPU | ||
| + | </FONT> | ||
| + | <BR>RCA/GE 1806</TH> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Addr</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>4000</TD> | ||
| + | <TD>3E</TD> | ||
| + | <TD>MVI A,01</TD> | ||
| + | <TD NOWRAP>; Load Accu, 01</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4001</TD> | ||
| + | <TD>01</TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Data</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | <TD> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Addr</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>4000</TD> | ||
| + | <TD>F8</TD> | ||
| + | <TD>LDI 01</TD> | ||
| + | <TD NOWRAP>; Load Accu, 01</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4001</TD> | ||
| + | <TD>01</TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Data</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD VALIGN=top> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Addr</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>4002</TD> | ||
| + | <TD>21</TD> | ||
| + | <TD NOWRAP>LXI H,0001</TD> | ||
| + | <TD NOWRAP>; Load HL, 0001</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4003</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 01 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Low Byte</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4004</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 00 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; High Byte</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | <TD VALIGN=top> | ||
| + | <TABLE BORDER=0 CELLPADDING=2> | ||
| + | <TR> | ||
| + | <TH>Addr</TH> | ||
| + | <TH>Data</TH> | ||
| + | <TH>Instruction</TH> | ||
| + | <TH>Comment</TH> | ||
| + | <TR> | ||
| + | <TR> | ||
| + | <TD>4002</TD> | ||
| + | <TD>68C0</TD> | ||
| + | <TD NOWRAP>RLDI R0,0001</TD> | ||
| + | <TD NOWRAP>; Load R0, 0001</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4004</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 00 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; High Byte</TD> | ||
| + | </TR> | ||
| + | <TR> | ||
| + | <TD>4005</TD> | ||
| + | <TD> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | 01 | ||
| + | </FONT></TD> | ||
| + | <TD></TD> | ||
| + | <TD>; Low Byte</TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </TD> | ||
| + | </TR> | ||
| + | </TABLE> | ||
| + | </CENTER> | ||
| + | |||
| + | <H3> | ||
| + | <FONT COLOR="0000FF"> | ||
| + | Little Endian versus Big Endian | ||
| + | </FONT></H3> | ||
| + | |||
| + | When dealing with multibyte values (eg. 16-bit or 32-bit data) | ||
| + | in memory a Big Endian CPU stores the <B>most</B> significant byte on the | ||
| + | lowest memory address. | ||
| + | <BR>In datacommunication systems a Big Endian CPU will first | ||
| + | transmit the most significant byte of a multibyte value. | ||
| + | |||
| + | <P> | ||
| + | A Little Endian CPU stores the <B>least</B> significant byte on the | ||
| + | lowest memory address. | ||
| + | <BR>In datacommunication systems a Little Endian CPU will tend to | ||
| + | transmit the least significant byte first, resulting in a | ||
| + | presentation problem when communicating to a Big Endian CPU. | ||
| + | |||
| + | <P> | ||
| + | Since TCP/IP was developed using PDP-11 Big Endian CPUs, Big Endian | ||
| + | is the standard on the network. When communicating to the network, | ||
| + | classical TCP/IP applications | ||
| + | (eg. Telnet, FTP) convert all data to/from Big Endian using libraries. | ||
| + | RPC applications use a separate protocol: XDR. | ||
| + | |||
| + | |||
| + | |||
| + | <P> | ||
| + | <FONT SIZE="-3"> | ||
| + | Copyright (C) 2003 Integrated Services; tux4u.nl<BR> | ||
| + | Author: Ing.J.M.Waldorp<BR> | ||
| + | endian.html 20020630 | ||
| + | </FONT> | ||
| + | |||
| + | |||
| + | </BODY> | ||
| + | </HTML> | ||
linux/architectuur/endian.html.txt ยท Laatst gewijzigd: 2018/12/30 17:17 (Externe bewerking)
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